This invention relates to stacking memory chips and more particularly to stacking Ball-Grid-Array (BGA) chips.
The size of Personal Computer (PC) components is constantly shrinking. Printed circuit board area is at a premium. PC system designers look for integrated circuits (IC's) that have the smallest form factors so more chips can be placed in less board space. As PC clock speeds increase there is also the need to bring integrated circuits closer together to minimize signal delay between chips. This has led to many innovative ways to configure integrated circuits on printed circuit boards.
Typically, memory chips are disposed on the surface of a substrate in a side-by-side arrangement with space left between to provide regions for electrical conductors for electrical interconnection of the chips. Chips can be electrically connected to substrate contact locations through chip leads located on the sides or bottom of each chip package. Currently, the densest packaging configuration for memory chips, such as Dynamic Random Access Memory (DRAM), may be obtained through the construction of memory chips placed side by side on both sides of a compact Printed Circuit Board (PCB) substrate. Each side of the PCB and wiring layers within the PCB contain electrical connections that include power supply, data, address and control lines.
However, the side-by-side arrangement of memory chips may not be the densest configuration that can be achieved. A better configuration might be to construct dense packages of stacked memory chips. This can be achieved through the use of adapter substrates that would allow memory chips to be connected on top of each other to construct a tower of memory. Each adapter substrate may sit directly on top of the next substrate with the substrate contact locations of adjacent chips aligned over one another. The bottom-most adapter card connects directly to the PCB.
It is possible to stack some types of electronic chips on top of each other to gain dense configurations. For example, Dual-In-line (DIP) and Thin Small Outline Package (TSOP) chips have connector pins that come out the sides of the package so they can be stacked in a piggy-back configuration. In other cases, adapter boards must be used to convert one pin configuration to another, such as to convert pins from a TSOP package to a Pin Grid Array Package (PGA).
Some integrated circuit packages allow for stacking of the electronic die within the package itself. For example, the Quad Flat No-lead (QFN) package can contain two stacked chips bonded back to back inside the same device. This type of QFN package allows each chip within the package to use the same pins on the QFN package lead frame. The QFN package lead frame has the contact pads on the bottom and sides of the package.
However, stacking of electronic chips such as the Ball Grid Array (BGA) is more difficult because BGA devices have contact pads in an array on the underside of the package body, rather than around the perimeter. What is desired is to stack BGA chips. It is desirable to stack BGA chips in a piggy-pack fashion.